Address | Input | Output | Internal Register | |||||
CS0 | RD | WT | A2 | A1 | A0 | OPM | ||
3FF0h | 0 |
0 | 1 | 0 | 0 | 0 | 0 | OPM STATUS REGISTER |
0 | 1 | 0 | 0 | 0 | 0 | OPM ADDRESS REGISTER | ||
3FF1h | 0 | 0 | 1 | 0 | 0 | 1 | OPM DATA REGISTER |
|
0 | 1 | 0 | 0 | 0 | 1 | OPM DATA REGISTER |
||
3FF2h | 0 | 1 | 0 | 0 | 1 | 0 | 1 | Register for data latched to ST0 to ST7 output ports |
0 | 0 | 1 | 0 | 1 | 0 | Data buffer for SD0 to SD7 input ports | ||
3FF3H | 0 | 1 | 0 | 0 | 1 | 1 | MIDI IRQ VECTOR ADDRESS REGISTER | |
0 | 1 | 0 | 1 | 1 | ||||
3FF4h | 0 | 1 | 0 | 1 | 0 | 0 | EXTERNAL IRQ VECTOR ADDRESS REGISTER | |
0 | 1 | 1 | 0 | 0 | ||||
3FF5h | 0 | 0 | 1 | 1 | 0 | 1 | MIDI standard UART DATA READ BUFFER | |
0 | 1 | 0 | 1 | 0 | 1 | MIDI standard UART DATA WRITE BUFFER | ||
3FF6h | 0 | 0 | 1 | 1 | 1 | 0 | MIDI standard UART STATUS REGISTER | |
0 | 1 | 0 | 1 | 1 | 0 | MIDI standard UART COMMAND REGISTER | ||
3FF7h | 1 | 1 | 1 |